PCIe 6.0 PHY for TSMC N6 IP Core
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...
Source: design-reuse.com
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LPDDR4X multiPHY Plus in GF (12nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and ...
Source: design-reuse.com
Configurable controllers for PCIe 3.1 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security Modules, ...
Source: design-reuse.com
MIPI M-PHY G4 Type 1 2TX2RX in GF (12nm)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The IP ...
Source: design-reuse.com
Post-Quantum Cryptography Processing Engine (PQP-HW-LAT) IP Core
PQPlatform - Lattice (PQP-HW-LAT) is a lattice engine that implements the ML-KEM and ML-DSA post-quantum algorithms, adding support for digital signatures ...
Source: design-reuse.com