MIPI C-PHY/D-PHY Combo RX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
Source: design-reuse.com
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MIPI CSI-2 Receiver
The MIPI CSI-2 Receiver IP is designed to provide MIPI CSI 1.01 compliant high speed serial connectivity for applications processors to corresponding camera modules in mobile platforms.
Source: design-reuse.com
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CD-PHY-CSIRX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
Source: design-reuse.com
MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
Source: design-reuse.com
MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes
Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and ...
Source: design-reuse.com