56G Ethernet PHY IP in 12FFC
The DesignWare 56G Ethernet PHY IP meets the growing high bandwidth and low latency needs of high-performance data center applications. Using leadingedge ...
Source: design-reuse.com
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50G Ethernet PCS/MAC/FEC IP Core
The fully integrated Physical Coding Sublayer (PCS) and Media Access Controller (MAC) core for 50Gbps Ethernet applications are compliant with IEEE 802.3cd ...
Source: design-reuse.com
QSGMII/SGMII/1000BASE-X and MAC IP Core
The fully integrated 5G QSGMII, 2.5G/1.25G SGMII and 1000BASE-X Physical Coding Sublayer (PCS-X) and Media Access Controller (MAC) core for Ethernet applications ...
Source: design-reuse.com
10G/25GBASE-R PCS+KR4 FEC IP Core
The fully integrated Physical Coding Sublayer (PCS), KR4 FEC and Media Access Controller (MAC) core for 25Gbps Ethernet applications are compliant with ...
Source: design-reuse.com
25GE/10GE/SGMII/1000BASE-X and MAC
The fully integrated Physical Coding Sublayer (PCS), KR FEC (IEEE Clause 74 – fire code FEC), SGMII / 1000BASE-X and Media Access Controller (MAC) core ...
Source: design-reuse.com