GDDR7 Memory Controller IP Core
The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (HPC), ...
Source: design-reuse.com
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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral ...
Source: design-reuse.com
12-bit, High Speed SAR ADC in GF (22nm)
Data converters are at the core of every analog interface to SoCs, which are moving into more advanced processes to take advantage of process scaling. ...
Source: design-reuse.com
32-bit Public Key Accelerator IP Core
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs ...
Source: design-reuse.com
I3C V1.1 Advanced Target IP Core
The I3C Advanced Target is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to ...
Source: design-reuse.com