25GE/10GE/SGMII/1000BASE-X and MAC
The fully integrated Physical Coding Sublayer (PCS), KR FEC (IEEE Clause 74 – fire code FEC), SGMII / 1000BASE-X and Media Access Controller (MAC) core ...
Source: design-reuse.com
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40G/100G Ethernet PCS/MAC IP Cores
The Alphawave 40G/100G Ethernet IP cores are cutting edge solution to the 40G/100G Ethernet application. It supports the Physical Coding Sublayer (PCS) ...
Source: design-reuse.com
PCIe4 Ethernet SERDES PHY
Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...
Source: design-reuse.com
PCS (Physical Coding Sublayer) IP IP Core
OpenFive’s PCS IP is fully compliant to the IEEE 802.3 standard supporting various MAC rates like 10G, 25G, 40G, 50G, 100G, 200G and 400G. Built ...
Source: design-reuse.com
PHY/PCS Logical Sub-Block IP Core for PCIe supporting PCIe 5.0, 4.0, 3.1 PHY/PMA and compliant to the PIPE 5.2 and 4.4.1 Specifications
XpressPCS for PCIe 5.0 is a logic design IP core implementing the Physical Coding Sublayer part of the PCIe 5.0 Specification. XpressPCS exposes a PIPE ...
Source: design-reuse.com