Avery Design extends collaboration with Rambus
Avery Design Systems, a specialist in functional verification solutions, is extending their long-term memory model and PCIe Verification IP (VIP) collaboration with Rambus.
Rambus uses Averyâs high-quality, full-featured memory models to verify its memory controllers including HBM2/2E, GDDR6, LPDDR4, and DDR3/4.
Rambus includes these memory models in its customer deliveries to enable out-of-the-box simulations with the delivered IP. Customers can then license the Avery memory models for use in full SoC verification. Rambus uses Averyâs PCIe VIP to verify its PCIe 5.0/4.0 controllers, including Endpoint, Root Port and Retimer modes, and PHYs.