The bidirectional MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. The MIPI D-PHY analog IP is available in foundry processes spanning 28nm to 180nm.
The MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols. It is a universal PHY that can be configured as a transmitter, receiver or transceiver. The D-PHY consists of an analog front end to generate and receive the electrical level signals, and a digital back end to control the I/O functions.
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