AMD develops Virtex UltraScale+ FPGA with low-latency Ethernet for its Alveo UL3524 fintech accelerator card
AMD has announced an FPGA-based accelerator card with ultra-low-latency Ethernet ports, specifically designed for high-frequency financial trading. Like all such cards, the Alveo UL3524 accelerator card pairs an FPGA with several high-speed, low-latency Ethernet ports, which terminate in four QSFP-DD cages. Each QSFP-DD cage is driven by eight GTF TX/RX transceiver pairs that terminate in…
Source: eejournal.com