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Cadence Digital and Custom/Analog Design Flows Certified by TSMC for Latest N3E and N4P Processes

Highlights: • Companies collaborate to accelerate next-generation mobile, AI and hyperscale design innovation • Customers actively designing with new N3E and N4P PDKs • Cadence digital and custom/analog flows optimized to support N3E and N4P requirements, enabling optimal PPA results and improved designer productivity SAN JOSE, Calif., June 13, 2022—Cadence Design Systems, Inc. (Nasdaq: CDNS)…
Chin Chi Teng Suk Lee Application Library Environment Digital Signoff Group At Cadence Design Infrastructure Management Division Cadence Design Systems Inc

Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes

SAN JOSE, Calif., May 27, 2021—Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it is expanding its collaboration with TSMC to accelerate mobile, AI and hyperscale computing application design using the integrated Cadence® digital flow and custom/analog tool suite on TSMC’s N3 and N4 process technologies. Joint Cadence and TSMC customers have already successfully…
Chin Chi Teng Suk Lee Digital Signoff Group At Cadence Design Infrastructure Management Division Cadence Design Systems Inc Companies To Work

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