Synopsys DesignWare® DDR multiPHY IP solutions are mixed-signal PHY IP cores that supply the complete physical interface to JEDEC standard DDR3, DDR3L .
Synopsys DesignWare® DDR3/2 PHY cores are mixed-signal PHY IP cores that supply the complete physical interface to JEDEC standard DDR3 and DDR2 SDRAM .
The Synopsys DesignWare® HBM2 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), graphics, and networking .
LPDDR4 multiPHY: Compatible with JEDEC standard LPDDR4 SDRAMs up to 4,267 Mbps - Maximum data rate is process technology dependent - Compatible with JEDEC .