Page 2 - Display Serial Interface News Today

Last September, I published an article on EEJournal.com that described two new Intel Agilex FPGA and SoC device families, the Agilex 5 D-series and an as-yet-unnamed series formerly known as “Sundance Mesa,” introduced at last year’s Intel Innovation. (See “Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 1.”) As discussed in that previous…

The Arasan DSI Transmit Controller IP is designed to provide MIPI DSI 1.3 compliant high speed serial connectivity for mobile host processors using 1 ...

The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile display modules with Type ...

Arasan’s Display Host and DSI device controllers are built on existing MIPI Alliance standards by adopting pixel formats, controlling pins and command ...

The Arasan DSI Device Controller IP is designed to provide MIPI compliant high speed serial connectivity for mobile display modules with Type 1 to 4 architectures. ...

Yesterday’s article described two new Intel Agilex FPGA and SoC device families, the Agilex D-series and an as-yet-unnamed series formerly known as “Sundance Mesa,” introduced this week at Intel Innovation. As discussed, the two new FPGA/SoC families share many characteristics starting with their monolithic construction. (See “Intel Introduces Two Monolithic Agilex FPGA and SoC Families,…

Arasan delivers you MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete GDSII ...

M31 provides a silicon-proven, low-power and low cost C-PHY/D-PHY combo IP in different process nodes. User can configure the PHY into D-PHY mode or C-PHY ...

Arasan’s VESA DSC v1.2 Encoder IP core compresses high-definition streams in real-time at resolutions ranging from 480 to 8K. The core supports 8, 10, ...

Arasan delivers you MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete GDSII ...