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Intel, AMD, Arm, TSMC, and Samsung, among others, introduced the new Universal Chiplet Interconnect Express (UCIe) consortium to standardize die-to-die interconnects between chiplets with an open-source design, thus reducing costs and fostering a broader ecosystem of validated parts.

A single software company can spend over 💲10 Billion/year, on data centres, but not every year is the same. When all stars align, we see bursts of new technologies reaching the market simultaneously, thus restarting the purchasing super-cycle. 2022 will be just that, so let’s jump a couple of quarters ahead and see what’s on the shopping list of your favourite hyperscaler! Friendly warning: this article is full of technical terms and jargon, so it may be hard to read if y...

Sweeping Changes Ahead For Systems Design Demand for faster processing with increasingly diverse applications is prompting very different compute models. Data centers are undergoing a fundamental change, shifting from standard processing models to more data-centric approaches based upon customized hardware, less movement of data, and more pooling of resources. Driven by a flood of web searches, Bitcoin mining, video streaming, data centers are in a race to provide the most efficient and fastest...

Samsung Electronics develops CXL-based next-generation DRAM memory technology for first time in industry ANI | Updated: May 12, 2021 07:35 IST Seoul [South Korea], May 12 (ANI/Global Economic): Samsung Electronics announced Tuesday that it has developed DRAM memory technology based on the next-generation interface "Compute Express Link (CXL)" for the first time in the industry. Samsung Electronics has secured the next-generation semiconductor technology lea...

Samsung develops next-generation DRAM memory ANI 12 May 2021, 12:18 GMT+10 Seoul [South Korea], May 12 (ANI/Global Economic): Samsung Electronics announced Tuesday that it has developed DRAM memory technology based on the next-generation interface "Compute Express Link (CXL)" for the first time in the industry. Samsung Electronics has secured the next-generation semiconductor technology leadership through the development of high-capacity, high-bandwidth DRAM technology that can dramatically imp...

May 11, 2021 01:26 EDT with 0 comments Samsung has arguablyturned its memory technology innovation all the way up to 11 recently. Earlier this year, the company announced the revolutionary AI-based HBM-PIM memory and today, it has announced the industrys first DDR5 memory solution to run on the Compute Express Link (CXL) interface. The South Korean giant says that the next-gen DDR standard will enable the movement of enormous amounts of data due to the massive capacities that it w...

Micron Abandoning 3D Xpoint in Favour for CXL Recently, Micron announced that it is dropping the development of 3D Xpoint memory in favour of CXL. What is 3D Xpoint, what is CXL, and why is Micron changing tact? What is 3D Xpoint memory? 3D Xpoint memory is a non-volatile memory technology that was developed by Intel and Micron. The technology, unlike NAND FLASH, allows for individual bits to be accessed which can provide it enhanced performance over NAND (which has to have entire blocks erased...

Press release content from Business Wire. The AP news staff was not involved in its creation. PLDA Announces a Unique CXL™ Verification IP Ecosystem, Delivering Robust Verification That Reduces Time-to-Design for CXL 2.0 Applications February 18, 2021 GMT SAN JOSE, Calif.--(BUSINESS WIRE)--Feb 18, 2021-- PLDA, the industry leader in high-speed interconnect solutions, today announced their CXL™ Verification IP Ecosystem which includes IP from partners Truechip and Avery Design Systems, who a...

Synopsys Announces Industrys First CXL 2.0 VIP Solution for Breakthrough SoC Performance Native System Verilog VIP Features Built-in Coverage, Verification Planning, and Memory-Aware Debug and Performance Analysis MOUNTAIN VIEW, Calif., Nov. 10, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industrys first Verification IP (VIP) for Compute Express Link ™ (CXL ™) 2.0 designed for breakthrough performance in data-intensive system-on-chips (SoCs)...

Synopsys Announces Industrys First CXL 2.0 VIP Solution for Breakthrough SoC Performance Native System Verilog VIP Features Built-in Coverage, Verification Planning, and Memory-Aware Debug and Performance Analysis MOUNTAIN VIEW, Calif., Nov. 10, 2020 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industrys first Verification IP (VIP) for Compute Express Link ™ (CXL ™) 2.0 designed for breakthrough performance in data-intensive system-on-chips (SoCs)...