Page 104 - P Core News Today

The multi-channel DesignWare® PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ ...

Arasan’s VESA DSC v1.2 Encoder IP core compresses high-definition streams in real-time at resolutions ranging from 480 to 8K. The core supports 8, 10, ...

The EIP-52 SM3 Engine implements the SM3 hash algorithm. The accelerators include I/O registers, hash calculation cores, message padding logic, and data ...

The DesignWare® ARC® EM Family of embedded processors is based on the scalable ARCv2 Instruction Set Architecture (ISA) and is optimized for energy ...

Credo is the world leading SerDes Technology. SerDes PMA is silicon proven IP offers in TSMC 7nm processes. Features include excellent insertion loss ...

The VLDS040MLNT005 part number represents the integration of a Vidatronic 20 mA Power Quencher™ LDO IP Core, a 6-bit programmable output level and a ...

Mobile Semiconductor s Trailblaze(TM) software delivers silicon-proven SRAM compilers to generate low voltage (LV), ultra high speed (UHS), multi-megabit ...

Mobile and IoT devices, including systems handing protected data and involved in content distribution and protection require that embedded security features ...

OPENEDGESTM is the only total memory system IP company providing both memory controller and on-chip interconnect. OMC is the ORBITTM DDR Memory Controller, ...

QuickLogic’s radiation-hardened eFPGA IP uses the company’s proven Australis eFPGA IP generation flow to provide customizable eFPGA IP optimized for ...