Page 108 - P Core News Today

The fully integrated Physical Coding Sublayer (PCS) and Media Access Controller (MAC) core for 50Gbps Ethernet applications are compliant with IEEE 802.3cd ...

The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & control ...

TICO compression is new patent-pending visually lossless light compression specifically designed for the industry. This revolutionary technology is extremely ...

The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it. New applications are emerging and ...

The Synopsys DesignWare® USB 3.0 femtoPHY and DesignWare® USB-C 3.0 femtoPHY provide designers with a complete physical (PHY) layer IP solution for ...

Arasan Chip Systems standalone MIPI D-PHY(SM) Transmit only for Globalfoundries 12nm FinFET process nodes. Arasans standalone D-PHY Tx only for Global ...

ARINC664 End System IP is an IP Core that implements ARINC664 part 7 and provides interface between aircraft LRUs and ARINC664 network. As an implementation ...

The DDR encrypter IP Core module enables on-the-fly encryption and authentication to the external memory It supports AXI slave/master interfaces, APB ...

Secure-IC’s integrated Security Services Platform (iSSP) provides a complete end-to-end security solution to supply, deploy and manage a fleet of devices ...

The EIP-312 – SM4-XTS Accelerator is specifically suited for next generation processors deployed in networking and storage appliances and SSD controller ...