Page 29 - P Core News Today

The PTP Transparent Clock (TC) from NetTimeLogic is a fully scalable implementation of a Peer-To-Peer, One-Step Transparent Clock according to IEEE1588. ...

The AR38U12 is a soft macro IP supporting industry-standard I2S, Left-Justified and Time-Division-Multiplexed (TDM) serial interface to parallel PCM (pulse-code-modulation) ...

The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency needs ...

The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s ...

The ODT-LUP-2I3O-7T-A1 is a latch-up detection solution that can support integration into advanced FinFET process nodes such as N7. The IP works in ...

Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specification ...

Harmony Trace by Arteris, the innovative Design Data Intelligence Solution for complex SoC and System-of-SoCs projects. Accelerate quality and functional ...

The sDSA-SW3.01 is a PDM-to-PCM converter to interface with digital microphones. This product optionally includes an Automatic Gain Control (AGC) for ...

The MVFD01 is a programmable frequency-to-digital converter that is designed to be easily integrated with MEMS resonators. The chip features a versatile ...

XIP1213H from Xiphera is a high-speed Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The ...