Page 10 - Synopsys Designware News Today

Highlights: (PRNewsfoto/Synopsys, Inc.) DesignWare Controller, PHY and Verification IP supports the latest features in the PCI Express 6.0 specification, enabling early SoC development Low-latency controller with new MultiStream architecture delivers up to 2X the throughput of a conventional PCI Express controller High-performance PHY in 5-nm process with unique analog and DSP techniques provides 20 percent less power across chip-to-chip, riser card and backplane interfaces Comprehensive set...

® EV Development Toolkit. By using Synopsys programmable ARC EV Processor, Kyocera successfully integrated high-performance artificial intelligence (AI) processing capabilities such as super resolution, with the flexibility to support future AI models. In addition, Kyocera deployed Synopsys HAPS ® FPGA-based prototyping system to accelerate ARC EV software development, SoC integration, and system validation. "Implementing advanced AI functionality into our MFP SoC required high-performance, l...

USB 2.0 femtoPHY in Samsung (14nm, 11nm, 8nm, 7nm, 5nm) The Synopsys DesignWare® USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications such as smartphones, tablets, digital TVs, and media players. Offering reduced silicon cost and longer battery life, the DesignWare USB 2.0 femtoPHY IP delivers 50% smaller die area and minimizes active and suspend power consumption. The DesignWare USB 2.0 femtoPHY implements t...

USB 2.0 femtoPHY in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, 10nm, 7nm, 6nm) The Synopsys DesignWare® USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications such as smartphones, tablets, digital TVs, and media players. Offering reduced silicon cost and longer battery life, the DesignWare USB 2.0 femtoPHY IP delivers 50% smaller die area and minimizes active and suspend power consumption. The DesignWare USB 2.0 femto...

Highlights ® 5.0 or CXL™ 2.0 architectures Pre-verified with DesignWare Controller IP for PCI Express technology and CXL enables fast integration and lowers risk Efficient encryption/decryption and authentication with AES-GCM helps ensure data confidentiality and integrity for high-performance systems Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the DesignWare ® Integrity and Data Encryption (IDE) Security Modules to help designers protect against data tampering and...

January 27, 2021 Synopsys Delivers Industry’s First Integrity and Data Encryption Security IP Modules for PCI Express 5.0 and Compute Express Link 2.0 Specifications DesignWare IDE Security IP Modules Protect Against Data Tampering and Physical Attacks in High-Performance Cloud Computing SoCs MOUNTAIN VIEW, Calif., Jan. 27, 2021 /PRNewswire/ — Highlights ® 5.0 or CXL™ 2.0 architectures Pre-verified with DesignWare Controller IP for PCI Express technology and CXL enables fast integrati...