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PLDA Announces a Unique CXL™ Verification IP Ecosystem, Delivering Robust Verification That Reduces Time-to-Design for CXL 2.0 Applications
February 18, 2021 GMT
SAN JOSE, Calif. (BUSINESS WIRE) Feb 18, 2021
PLDA, the industry leader in high-speed interconnect solutions, today announced their CXL™ Verification IP Ecosystem which includes IP from partners Truechip and Avery Design Systems, who are pioneering CXL design verification. Compute Express Link™ (CXL) is an open industry standard interconnect that builds on PCI Express 5.0’s infrastructure to reduce complexity and system cost while increasing performance. PLDA’s CXL Verification IP Ecosystem is intended to reduce the challenges of designing new CXL applications. By combining leading third-party VIP and PLDA’s best-in-class CXL controller IP, CXL designers will have the ability to choose the most flexible and complete
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9:39 am
Microchip has this week announced the world’s first PCI Express 5.0 Switches, in the form of the new Switchtec PFX PCIe 5.0 range of products. Providing double the interconnect performance for dense compute, high speed networking and NVM Express (NVMe ) storage. Microchip has released a full set of design-in collateral, reference designs, evaluation boards and tools to support customers building systems that take advantage of the high-bandwidth of PCIe 5.0.
The Switchtec PFX PCIe 5.0 range of switches are sampling now to qualified customers worldwide, for more information contact Microchip directly from the company’s website.
“Accelerators, graphic processing units (GPUs), central processing units (CPUs) and high-speed network adapters continue to drive the need for higher performance PCIe infrastructure. Microchip’s introduction of the world’s first PCIe 5.0 switch doubles the PCIe Gen 4 interconnect link rates to 32 GT/s to support the most deman
Feb 4, 2021 13:08 EST
Sapphire Rapids has been rumored for some time, but the closer we get to the expected 2023 launch, the more leaks we are getting. The latest development of the 4th generation Intel s Xeon processors has been the first leaked images of the CPU. Leaker YuuKi-AnS published the first picture of the alleged Sapphire Rapids-SP CPU based on Intel s 10nm process. The chip goes by the codename QVV5 and will be used on the Eagle Stream platform. The big-ticket features are the PCIe 5.0 support as well as DDR5 memory that goes up to 8-channel.
Intel s Sapphire Rapids Processors Looks To Be Supported The First Of Many Technologies Including PCIe 5.0 Support And DDR5 8-Channel Memory
Accelerating machine learning and hyperscale computing infrastructure
Microchip Technology has released what is claimed to be the world’s first PCIe 5.0 switch solutions the Switchtec PFX PCIe 5.0 family doubling the interconnect performance for dense compute, high-speed networking and NVM Express (NVMe) storage. Together with the XpressConnect retimers, the company is the industry’s only supplier of both PCIe Gen 5 switches and PCIe Gen 5 retimer products, giving a complete portfolio of PCIe Gen 5 infrastructure solutions with proven interoperability.
“Accelerators, GPUs, CPUs and high-speed network adapters continue to drive the need for higher performance PCIe infrastructure. Microchip’s introduction of the world’s first PCIe 5.0 switch doubles the PCIe Gen 4 interconnect link rates to 32 GT/s to support the most demanding next-generation machine learning platforms,” said Andrew Dieckmann, associate vice president of marketing and applications engineering for Mic