Astera Labs and Avery Design Partner on CXLTM 2.0 Verificati

Astera Labs and Avery Design Partner on CXLTM 2.0 Verification for Smart Retimer Portfolio to Improve Performance in Data-Centric Applications


April 30, 2021
Astera Labs and Avery Design Partner on CXLTM 2.0 Verification for Smart Retimer Portfolio to Improve Performance in Data-Centric Applications
Astera Labs Aries Smart Retimers resolve signal integrity issues for high-performance server, storage, cloud and workload optimized systems
Avery PCIe and CXL Verification IP enabled Astera Labs to get to market faster
Tewksbury, MA., April 28, 2021 — Avery Design Systems, a leader in functional verification solutions, today announced that Astera Labs, a pioneer in connectivity solutions for intelligent systems, successfully used Avery’s Compute Express Link™ (CXLTM) 2.0 and PCI Express® (PCIe®) 5.0 Verification IP (VIP) and services in developing its Aries Smart Retimer portfolio.

Related Keywords

Chris Browy , Avery Pcie , Express , Astera Labs Aries Smart Retimers , Astera Labs , Avery Design Systems , Compute Express Link , Aries Smart Retimer , Kalyan Mulam , Avery Design , எக்ஸ்பிரஸ் , அஸ்டெரா ஆய்வகங்கள் , காவேரி வடிவமைப்பு அமைப்புகள் , கணக்கிடு எக்ஸ்பிரஸ் இணைப்பு , காவேரி வடிவமைப்பு ,

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