DSC Decoder IP Core : vimarsana.com

DSC Decoder IP Core


DSC Decoder
Display Stream Compression (DSC) standard was announced by Video Electronics Standards Association (VESA) in 2014 for video data compression and has been also adopted into the VESA's eDP v1.4 and the MIPI DSI standard.
Compliant with the VESA DSC 1.2a standards, CYB-DSC2d IP core supports MMAP, BP, MPP, ICH and 4:4:4 sampling. It performs visually lossless compression, low gate count and latency for ultrahigh definition display applications. It can be fastly and easily integrated into ASIC and FPGA applications for 4K / UHD TV, DisplayPort 1.4, USB Type-C device and AR / VR product.
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Related Keywords

, Video Electronics Standards Association , Display Stream Compression , காணொளி மின்னணுவியல் தரநிலைகள் சங்கம் , காட்சி ஸ்ட்ரீம் சுருக்க ,

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