FPGA Evaluation Platform for Codasip Application Processor RISC-V cores including AXI or AHB interconnect and Peripherals This FPGA platform aims to simplify the evaluation of a Codasip application processor (A family) cores. The subsystem is based on either AXI or AHB and provides a variety of commonly-used peripherals which enable the rapid testing and assessing of a core on an Xilinx-based Digilent FPGA boards. The target FPGA board depends on what is being evaluated with the following options: a) Digilent Nexys A7 for a single A70X core b) Digilent Nexys Video of a one- or two-core multiprocessor system c) Digilent Genesys 2 for a four-core multiprocessor system