GUC announces GLink-3D Die-on-Die interface IP : vimarsana.c

GUC announces GLink-3D Die-on-Die interface IP


GUC announces GLink-3D Die-on-Die interface IP
Global Unichip (GUC), an ASIC developer, has announced GLink-3D die-on-die interface IP using TSMC's N5 and N6 processes and 3DFabric advanced packaging technology for AI, HPC, and networking applications.
With AI, HPC and networking memory demand growing there is a need for SRAM/Logic disintegration allowing the implementation of separate SRAM and Logic at the most efficient process nodes.
Layers of CPU and SRAM (Last Level Cache, packet buffers) dies can be assembled over and under interconnect/IO dies using TSMC's 3DFabric packaging technology and these expandable SRAM and modular computing applications can be enabled by GUC GLink-3D high bandwidth, low latency, low power, and point-to-multipoint interface between 3D stacked dies.

Related Keywords

, Ken Chen , Igor Elkanovich , Network Processors , Last Level Cache , Basic , Interface , Memory , கேன் சென் , வலைப்பின்னல் ப்ராஸெஸர்ஸ் , கடந்த நிலை தற்காலிக சேமிப்பு , அசிசி , உணர்ச்சி ,

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