Memory & Bus Protection IP Core IP Core
The Memory & Bus Protection IP Core module enables on-the-fly encryption/decryption and authentication to the external memory. It supports AHB/AXI ...
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The Memory & Bus Protection IP Core module enables on-the-fly encryption/decryption and authentication to the external memory. It supports AHB/AXI ...
In this paper, an innovative directional comparison bus protection (DCBP) scheme based on fault current superimposed component (FCSC) is proposed. Unlike current differential bus protection (CDBP) methods, conventional DCBP schemes not only need current and voltage signals but their performance can be adversely affected by capacitor coupling voltage transformer transients or large voltage drops at the relay location during close-in faults. Furthermore, it is often not possible to implement DCBP schemes in distribution networks due to the absence of a potential transformer, and in any case, due...