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Sophisticated chip packaging helped Nvidia Corp. develop industry-leading AI accelerators, but limited suppliers are now proving a bottleneck for the US company.
Chip Packaging Semiconductor Cadence Systems: Sophisticated chip packaging helped Nvidia Corp. develop industry-leading AI accelerators, but limited suppliers are now proving a bottleneck for the US company.
The stacking of chiplets into a multifunctional 3D chip is among the many ways using which silicon designers are improving their capabilities.
Intel: Its innovations include EMIB (embedded multi-die interconnect bridge) and Foveros, technologies that allow multiple chips on a package to be connected side by side (EMIB) or stacked on top of one another in a 3D fashion (Foveros).
IBM and ASMPT's new hybrid bonding technique could revolutionise semiconductor design by increasing die connection density.