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Optimizing an OpenCL AI Kernel for the Data Center using SLX FPGA and Vitis HLS 20.2 or earlier - Vimarsana News

Optimizing an OpenCL AI Kernel for the Data Center using SLX FPGA and Vitis HLS 20.2 or earlier

Vitis Unified Software Platform 2020.2 The entire end to end flow is demonstrated in figure 1. The flow starts with creating a new SLX project. However, if you have an existing Vitis HLS project, SLX FPGA can directly import it.     Launch SLX FPGA and start the project creation wizard by clicking the “New SLX project”   icon. Create a new SLX FPGA project as shown in figure 2. The next step is to configure this project     The configuration editor will automatically appear when you create a new project, but you can also bring it up anytime by clicking the orange gear button   . D...