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GUC Delivers its First TSMC N3 Chip and First AI-Optimized N5 Design Using Cadence Digital Solutions - Vimarsana News

GUC Delivers its First TSMC N3 Chip and First AI-Optimized N5 Design Using Cadence Digital Solutions

Highlights: • Using Innovus Implementation, GUC delivered a 3.16GHz HPC core design with 3.5M instances on the TSMC N3 process technology • GUC realized a 9% area shrink and an 8% reduction in power consumption on a CPU design on the TSMC N5 process using the AI-enabled Cadence Cerebrus SAN JOSE, Calif., January 19, 2023 —Cadence…

GUC Delivers its First TSMC N3 Chip and First AI-Optimized N5 Design Using Cadence Digital Solutions - Vimarsana News

GUC Delivers its First TSMC N3 Chip and First AI-Optimized N5 Design Using Cadence Digital Solutions

18.01.2023 - Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Global Unichip Corp. (GUC) successfully delivered an advanced HPC design and a CPU design using Cadence digital solutions. The HPC design was created using the Cadence Innovus ...

Cadence and Tower release RF SOI process - Vimarsana News

Cadence and Tower release RF SOI process

Cadence and Tower Semiconductor  have released a silicon-validated SP4T RF SOI switch reference design flow using the Cadence Virtuoso Design Platform and