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SAN JOSE, Calif., May 27, 2021—Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it is expanding its collaboration with TSMC to accelerate mobile, AI and hyperscale computing application design using the integrated Cadence® digital flow and custom/analog tool suite on TSMC’s N3 and N4 process technologies. Joint Cadence and TSMC customers have already successfully…

Cadence collaboration with Arm enables tape-out of next-generation mobile designs Cadence Design Systems has announced that a collaboration with Arm has enabled customers to successfully tape-out next-generation Arm mobile designs. According to Cadence, customers have successfully taped out mobile SoCs using its tools for the next-generation Arm mobile solution, which includes the Arm Cortex-X2, Cortex-A710, and Cortex-A510 CPUs, Mali-G710 GPU and the DynamIQ Shared Unit-110. As part of the collaboration, Cadence has fine-tuned its digital and verification full flows ...

Cadence Collaborates with Arm to Accelerate Hyperscale Computing, 5G Communications SoC Development Cadence Design Systems, Inc. announced that it is expanding its collaboration with Arm to speed hyperscale computing and 5G communications SoC development using Cadence® tools and the new Arm® Neoverse™ V1 and Neoverse N2 platforms. To build upon previous silicon successes where leading customers used the first-generation Arm Neoverse N1 platform and Cadence digital and verification tools on 7nm process technologies, Cadenc...

Highlights: Latest collaboration builds upon previous successes where leading server customers reached silicon on 7nm using the previous-generation Arm Neoverse N1 platform and Cadence tools Cadence optimized its RTL-to-GDS digital full flow and delivered corresponding 5nm and 7nm RAKs for Arm Neoverse V1 and Neoverse N2 platforms, enabling designers to get to market faster Cadence’s verification full flow enables Neoverse V1 and Neoverse N2 platform users to achieve highest verification throughput and preparedness for Arm SystemReady compliance SAN JOSE, Calif., April 27, 2021—Cadence De...

Collaboration looks to accelerate hyperscale computing SoC design Cadence Design Systems has revealed that it has optimised the Cadence digital 20.1 full flow for Samsung Foundry’s advanced-process technologies down to 4nm. As a consequence of the company's collaboration designers can now use Cadence tools to achieve optimal power, performance, and area (PPA) and deliver accurate, first-pass silicon for hyperscale computing applications. Cadence's digital 20.1 flow is able to provide capabilities that are well-suited for Samsung Foundry’s advanced-process tec...