RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of interrupt ...
Source: design-reuse.com
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AHB-Lite Timer IP Core
The Roa Logic AHB-Lite Timer IP is a fully parameterized soft IP implementing a user-defined number of timers and functions as specified by the RISC-V ...
Source: design-reuse.com