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Codasip joins OpenHW® Group to contribute to RISC-V verification - Vimarsana News

Codasip joins OpenHW® Group to contribute to RISC-V verification

Munich, Germany, 21 September 2022 – Codasip, the leader in customizable RISC-V processor IP, announced it has joined OpenHW Group. Together with the existing OpenHW ecosystem, Codasip will cont...

Open source chip design: The big picture of RISC-V ecosystem is emerging - Vimarsana News

Open source chip design: The big picture of RISC-V ecosystem is emerging

In this article we try to provide you design software/tools companies offering product and support service to RISC-V based chip designs from small companies to biggest chip design experts such as Intel.

Imperas unifies new RISC-V verification ecosystem with RVVI - Vimarsana News

Imperas unifies new RISC-V verification ecosystem with RVVI

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced the official 1.0 release of the new RVVI (RISC-V Verification Interface) as a foundation for the new RISC-V verification ecosystem. The open standard ISA (Instruction Set Architecture) of RISC-V has stimulated the interest in optimized processors across almost all market segment and application areas. Since previously…