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Codasip joins OpenHW® Group to contribute to RISC-V verification

Munich, Germany, 21 September 2022 – Codasip, the leader in customizable RISC-V processor IP, announced it has joined OpenHW Group. Together with the existing OpenHW ecosystem, Codasip will cont. ....

Mike Eftimakis , David Marsden , Tora Fridholm , Edward Wilford , Rick Oconnor , Openhw Verification Task Group , Riscv International , Marketing Communications , Openhw Group , Pr Communications Global , Openhw Cores Task Group , Senior Principal Analyst , Iot Hardware , Task Group ,

Imperas unifies new RISC-V verification ecosystem with RVVI

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced the official 1.0 release of the new RVVI (RISC-V Verification Interface) as a foundation for the new RISC-V verification ecosystem. The open standard ISA (Instruction Set Architecture) of RISC-V has stimulated the interest in optimized processors across almost all market segment and application areas. Since previously… ....

Simon Davidmann , Rick Oconnor , Openhw Verification Task Group , Imperas Software Ltd , Seagate Technology , Openhw Group , Instruction Set Architecture , Task Group , Ricko Connor , Imperas Software , Nvidia Networking , Silicon Labs , Valtrix Systems ,