High-Performance Edge AI Accelerator IP Core
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s ...
Source: design-reuse.com
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PCIe 2.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP/ULL
The PCIe2.0 PHY IP is an all-in-one physical layer (PHY) IP solution for mobile and consumer applications. The PHY IP includes mixed-signal circuits to ...
Source: design-reuse.com
28n-TSMC Leakage Monitor IP Core
CT23302 provides means to determine the leakage current of some pre-defined MOS devices in the TSMC 28n technology node. It is also possible to estimate ...
Source: design-reuse.com
XSR PHY for TSMC N5 IP Core
The Synopsys USR/XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modules ...
Source: design-reuse.com
MIPI D-PHY CSI-2 RX (Receiver) in TSMC 16FFC
He MXL-DPHY-CSI-2-RX-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for ...
Source: design-reuse.com