XSR PHY for TSMC N5 IP Core
The Synopsys USR/XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modules ...
Source: design-reuse.com
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The Synopsys USR/XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modules ...