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Audio I2S-TDM Transceiver The IObundle I 2 S/TDM Transceiver core is a configurable audio interface core with transmission and receiving capabilities. It supports master/slave, internal DMA, multi-channel and several sample sizes and frame formats. The IP is currently supported for use in ASICs and FPGAs. View see the entire
MIPI C-PHY/D-PHY Combo IP CSI-2 TX+, 3.5Gsps/2.5Gbps The MXL-CDPHY-2p5G-CSI2-TX+-40LP is a high-frequency, low-power, low-cost, source synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v2.1 and C-PHY v1.2. The PHY can be configured as a MIPI Master supporting camera interface CSI-2. The PHY supports mobile, IoT, virtual reality, and automotive applications. The CSI-2 TX+ is a Mixel proprietary configuration that is optimized to support full-speed production and in-system testing while minimizing area and leakage power. View see the entire get in contac...
DMA Back-End Core The Northwest Logic DMA Back-End Core from Rambus provides high-performance, scatter-gather DMA operation in a flexible fashion. This enables the core to be easily integrated and used in a wide variety of DMA-based systems. Key features which contribute to this flexibility include: • Works with Northwest Logic soft Expresso Cores and FPGA hard cores • Can be configured with multiple independent DMA Engines which each have their own user interface • Supports Packet/Block and Addressed/Non-addressed transfers • Supports host –based and local descriptors...
Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACsec up to 10 Gbps in multi-core application or communication processors offering a large selection of cipher algorithms. Designed for fast integration, maximum CPU offload and offering full transforms, it provides a reliable and cost-effective embedded IP solution that is easy to integrate into multi-core SoC designs. The Multi-Protocol Engine is pre-integrated with the DPDK, Linaro ODP and Linux crypto ...
DDR4 Controller Northwest Logic DDR4 Controller Core from Rambus is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The core accepts commands using a simple local interface and translates them to the command sequences required by DDR4 SDRAM devices. The core also performs all initialization, re-fresh and power-down functions. The core uses bank management modules to monitor the status of each SDRAM bank. Banks are only opened or closed when necessary, minimizing access delays. Up to 32 banks can be managed at one time. Th...