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It looks like Intel wants to make a bigger push into the world of cryptocurrency, though not necessarily with its upcoming discrete GPU launch.
Intel could be planning to introduce its own crypto ASIC that is more energy-efficient than standard mining rigs.
Anantha Chandrakasan, dean of the MIT School of Engineering and Vannevar Bush Professor of EECS, has been named the recipient of the 2022 IEEE Mildred Dresselhaus Medal in recognition of his “contributions to ultralow-power circuits and systems, and leadership in academia and advancing diversity in the profession.”
Samsung demonstrates 3nm MBCFET chip: using nanochip structure to make transistors Samsung Electronics and TSMC are currently planning to develop 3nm process technology research and development. According to reports, at the IEEE International Solid-State Circuits Conference (ISSCC), Samsung engineers shared the manufacturing details of the upcoming 3nm GAE MBCFET chip. GAAFET transistors (gate full ring field-effect transistors) come in two forms in terms of structure, and they are an upgraded version of the current FinFET. Samsung stated that the traditional GAAFET process uses three lay...
It is expected that today's popular FinFET transistor design will give way to stacked nanosheet transistors in the coming years – for various design and technology reasons. TSMC plans to stick with FinFET for 3nm, but Samsung is bravely / dangerously forging ahead with plans for a transition to nanosheet transistors with its 3nm nodes, reports IEEE Spectrum. Samsung Electronics vice president, Taejoong Song, presented at the IEEE International Solid-State Circuits Conference earlier this month and outlined some key advantages of nanosheet transistors. "We have used FinFET transistors for ab...