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Long, long ago, at the turn of the millennium, two champions of configurable processor IP – ARC and Tensilica – battled for dominance in that arena with unique processor ISAs and custom tools to aid in creating software-development tool chains for their configurable processors. Synopsys bought ARC in 2011, and Cadence bought Tensilica a couple…
Next-Generation ARC-V Processor Targets Embedded Automotive, Storage, and IoT Applications Highlights: New Synopsys 32-bit and 64-bit ARC-V Processor IP, built on decades of experience developing...
It may be less than a decade since the first RISC-V workshops were held, but today the open architecture is finding its way into a myriad of chips and technologies...
PLS Programmierbare Logik & Systeme provides comprehensive analysis, test and debugging functions for the latest generation of Aurix microcontrollers from Infineon. Starting immediately, developers can use the new functions on the latest version of the Universal Debug Engine (UDE).
Lauta (Germany) / Cupertino (CA), January 26, 2022 - With the latest version of its Universal Debug Engine® (UDE) PLS Development Tools is providing system developers with comprehensive analysis, test and debugging functions for the latest generation of AURIX™ microcontrollers from Infineon. The highly integrated multi-core SoCs of the TC4x family, manufactured in 28-nm technology,…