PCIe 3.0 PHY in UMC (12nm) IP Core
The multi-lane Synopsys Multi-Protocol 10G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio, meeting the growing needs ...
Source: design-reuse.com
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PCIe 3.0 PHY in UMC (28nm) IP Core
The multi-lane Synopsys Multi-Protocol 10G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio, meeting the growing needs ...
Source: design-reuse.com
25G Ethernet PHY in TSMC (16nm, 12nm, N7)
The multi-lane Synopsys Multi-Protocol 25G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and ...
Source: design-reuse.com
112G LR-Max Ethernet PHY for TSMC N5
Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performance ...
Source: design-reuse.com