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2023 is here, and technology trends around Compute Express Link (CXL) and the next generation of AMBA protocols (CHI-E/F) are getting more traction. The ...
Cadence Design Systems has developed a DRAM verification solution, that will allow customers to test and optimise system-on-chip (SoC) designs for data centre, consumer, mobile and automotive applications.
Highlights: • New solution accelerates IP-to-SoC-level verification for complex memory controllers, PHYs and devices for LPDDR5x, DDR5, HBM3 and GDDR6 protocols • Up to 10X increase in verification throughput enables total IP-to-SoC-level verification of advanced designs with multiple DDR interfaces SAN JOSE, Calif., January 20, 2022— Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced a…