USB 3.0 PHY in Samsung (28nm, 14nm)
Synopsys' DesignWare USB-C 3.0 and USB 3.0 PHY IP provide designers with the industry's best combination of low area and low power with support for the ...
Source: design-reuse.com
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USB 3.0 femtoPHY in Samsung (14nm, 11nm, 10nm)
The Synopsys DesignWare® USB 3.0 femtoPHY and DesignWare® USB-C 3.0 femtoPHY provide designers with a complete physical (PHY) layer IP solution for ...
Source: design-reuse.com
USB 2.0 PHY IP Core
The USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use with host, embedded host, On-the-Go (OTG) and function controllers.
Source: design-reuse.com
USB 2.0 picoPHY in TSMC (40nm, 28nm)
The Synopsys DesignWare® USB 2.0 picoPHY provides designers with a complete physical (PHY) layer IP solution, designed for low power mobile and consumer ...
Source: design-reuse.com
USB 2.0 femtoPHY in Samsung (14nm, 11nm, 8nm, 7nm, 5nm)
USB 2.0 femtoPHY in Samsung (14nm, 11nm, 8nm, 7nm, 5nm) The Synopsys DesignWare® USB 2.0 femtoPHY provides designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications such as smartphones, tablets, digital TVs, and media players. Offering reduced silicon cost and longer battery life, the DesignWare USB 2.0 femtoPHY IP delivers 50% smaller die area and minimizes active and suspend power consumption. The DesignWare USB 2.0 femtoPHY implements the latest USB battery charger version 1.2 and USB On-The-Go (OTG) version 2.0 specifications from th...
Source: design-reuse.com