Silexica’s New SLX FPGA 2020.4 Ushers in a New Level of Usability
San Jose, CA – January 11, 2021 – Silexica (silexica.com) has announced the release of SLX FPGA 2020.4 to expand the adoption of high-level synthesis (HLS) for FPGA designs. This release includes a new interactive, task-based flow that walks HLS users through the design flow from start to finish. The task-based flow recommends next steps and possible analysis results relevant to the user at each step in the flow. In addition, SLX FPGA 2020.4 incorporates optimizations to the profiling capability that allow designers to understand the execution costs from an FPGA implementation vs a CPU implementation and quickly identify bottlenecks, improving time-to-market.