Breakfast Bytes News Today

Earlier this week I wrote a post covering the AWS presentation from HOT CHIPS about the Nitro project. Although the Nitro chips all contain Arm processors, ...

That's a lot of buzzwords! I assume you already know that SerDes stands for serializer-deserializer. It is an IP block that takes parallel data from buses ...

I wrote the first post, The Chiplet Summit, from the recent Chiplet Summit in San Jose, If you have not seen that, you should probably read it first. ...

NASA needs a new computer. Being NASA, of course, this has an acronym, HPSC. Unusually for NASA, this has four letters, not three. Remember back in the ...

As you know from previous blog posts, I attended IEDM in San Francisco in December. There were two presentations about TSMC's N3 process. This is actually ...

At the RISC-V Summit in December, there were presentations halfway between a keynote and a technical session. known as RISC-V Spotlights. These were presented ...

I recently talked to Ashish Darbari, the CEO of Axiomise. They are based in London, where Ashish ended up having bounced around the world. But more of ...

Recenty, it was the Samsung Foundry Forum (SFF). In fact, there was a pre-event for the press that morning (SFF started after lunch). I couldn't attend ...

Mar. 15, 2021 PCIe, or Peripheral Component Interconnect Express which nobody ever says, was an upgrade to the earlier PCI bus. This was developed by Intel and introduced in 1992. It replaced several older, slower buses that had been used in a somewhat ad-hoc fashion in early PCs. It was primarily a 32-bit bus, although the standard allowed for 64-bit. Most importantly, it was a parallel bus. Today, it is only of historical interest and is no longer in active use, so I wont go into any detail...