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AV1 fixed function HW decoder IP for 4Kp60 4:2:0 10 bit

The WAVE510A is the 2nd generation video IP which is enhanced performance for high-end UHD SoC, which requires about 450MHz clock frequency to decode .

Dual-Core HEVC, AV1 & H 264, AVS2, VP9 Combined Decoder

Dual-Core HEVC, AV1 & H.264, AVS2, VP9 Combined Decoder The WAVE537 is a dual-core decoder IP, architected for decoding video to 8K60fps(900MHz) in HEVC/H.265, AVC/H.264, VP9, AVS2, AV1 standard formats in real-time with the most optimized size and stable decoding performance. The WAVE537 is cost-effective as it is architected to pick out and reuse sharable blocks from various codec standards and apply them to the common blocks, in which the IP architecture becomes streamlined with minimum logics and memories fitting into small-sized SoCs . The IP provides maximum bandwidth efficiency and exceptionally low power consumption across all connected devices. With Chips&Media s proprietary buffer compression technology called CFrame, it saves about 50 percent bandwidth access to memory on average with lossless compression.

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