Page 125 - P Core News Today

Comcores IP-core is a silicon agnostic implementation of the CPRI 7.0 standard targeting any ASIC, FPGA or ASSP technologies. With its extreme flexibility, ...

This macro-cell is a low power voltage-current reference (1.21V / 600nA) with high accuracy (±0.5% over PVT) after trimming. Trimming capability allows ...

Synopsys provides a broad portfolio of high-quality, silicon-proven foundation IP, including memory compilers and non-volatile memory (NVM), logic library, ...

The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock. ...

The Synopsys DesignWare HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications ...

Rambus Hardware Root of Trust RT-630-FPGA is a fully-programmable hardware security core offering security by design. It protects against a wide range ...

The HSM IP module is a Hardware Security Module for automotive applications. It is developed, validated and licensed by Silex Insight (partner of Xilinx) ...

The Spacewire Codec with AHB host interface implements the Spacewire standard with the protocol identification extension (ECSS-E- 50-12 part 2) and RMAP protocol draft C.

The GRECC core implements Elliptic Curve Cryptography (ECC) which is used as a public key mechanism and is well suited for application in mobile communication. ...

The Rambus Multi-Port Front-End Core from Rambus provides a multi-port interface to Rambus Memory Controller Cores. Each user request is provided with ...