Page 123 - P Core News Today

The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AES ...

SureCore’s EverOn™ Single Port Synchronous Ultra Low Voltage SRAM IP combines high-density foundry bitcells with sureCore’s low-voltage and low-power ...

SPI flash memory controller allows flexible, fast and high performance implementation of an AHB subsystem having SPI flash memories and offloading AHB ...

NSCores PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the hot carrier effect to trap ...

The Cryptographic Coprocessor (or CryptoSoc Accelerator) is a hardware IP core platform that accelerates cryptographic operations in System-on-Chip (SoC) ...

Designers face the challenge of creating secure, cost-effective, low power, and reliable designs. Synopsys’ embedded one-time programmable (OTP) non-volatile ...

RayCore Lite IP is designed based on MIMD architecture. This approach enables more efficient execution of independent parallel tasks – each ray is regarded ...

The DesignWare® SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes ...

Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through side channel and fault injection attacks ...

USB 5G,10G, 20G and 4.0 Device router controller is a highly configurable core and implements the USB device functionality and can be interfaced with ...