Page 122 - P Core News Today

The use of IP cores in ASIC, FGPA and system-on-chip (SoC)design has become a critical methodology as companies struggle to address the need for rapid ...

The Alphawave PipeCORE PHY IP is a high-performance, low-power, low latency PCIe Gen1 – Gen6 and CXL PHY, that supports both NRZ and PAM4 modulation. ...

Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. ...

The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to a design. The IO are ...

The EIP-59 is the IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), ...

The LP-802.15.4 is a power and area-optimized implementation of the IEEE 802.15.4 physical and medium access control layers. It is designed to bring ...

Fortrix is a self-contained, feature-rich IP platform which provides Root-of-Trust and cybersecurity features to chiplet based systems and standard SoCs. ...

The TS_SW_4Cap_X8 is a quadruple capacitor switch that can be used for resonator/transducer trimming. TES can transfer this IP to other technologies upon ...

Rambus Error Correction Coding (ECC) Core implements the standard Hamming Code based DRAM Single Error Correction (SEC) and Double Error Detection (DED) ...

DisplayPort heralds a new alternative in video connectivity. Designed to enable low cost direct drive monitors and backed by industry leaders (Intel, ...