LPDDR5/LPDDR4 combo PHY on 14nm, 12nm
OPENEDGES is the only total memory system IP company providing Network on-Chip Interconnect (OIC), LPDDR54 Orbit Memory Controller (OMC), and LPDDR54 ...
Source: design-reuse.com
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Single Port, Ultra Low Leakage, GF 22FDX, Register File Compiler
Mobile Semiconductor s Trailblaze(TM) software delivers silicon-proven SRAM compilers to generate low voltage (LV), ultra high speed (UHS), multi-megabit ...
Mobile Semiconductor Built In Self Test Register File Compiler Embedded Memory Ultra Low Leakage Globalfoundries 22fdx
Source: design-reuse.com
PUF-based Secure Crypto Coprocessor IP Core
PUFcc (former known as PUFiot) is a novel high-security Crypto Coprocessor IP, combining a Hardware Root of Trust with a full suite of cryptographic algorithms, ...
Source: design-reuse.com
High-performance 32-bit RISC CPU IP Core
The eSi-3250 32-bit CPU is targeted specifically for applications with high performance requiring caching, due to the use of slow on-chip memories such ...
Source: design-reuse.com
AXI4 Multi-Channel DMA Controller IP Core
The Digital Blocks DB-DMAC-MC-AXI is a Multi-Channel DMA Controller supporting 1 – 16 independent data block / packet / stream transfers. The Direct ...
Digital Blocks Direct Memory Access Dma Controller Direct Memory Access Controller Scatter Gather Xi4 Multi Channel Dma Controller
Source: design-reuse.com
Image Signal Processing (ISP) RTL IP for IR/Mono/RGB Bayer/RGB-IR/PDAF/HDR/Fish Eye/3A Sensors Image Process to Human/Machine Vision
Altek ISP RTL IPs have good image quality to deal with different types of image sensor(ie. IR/Mono/RGB Bayer/RGB-IR/PDAF/HDR/Fish eye/3A/….) into human/machine ...
Source: design-reuse.com
RivieraWaves 802.11ax (Wi-Fi 6) 1x1 20MHz STA Low Power MAC & modem
The RivieraWaves Wi-Fi IP family offers a comprehensive suite of IPs and platforms for embedding Wi-Fi connectivity into SoCs/ASSPs addressing a broad ...
Source: design-reuse.com
DDR multiPHY in GlobalFoundries (40nm, 28nm)
Synopsys DesignWare® DDR multiPHY IP solutions are mixed-signal PHY IP cores that supply the complete physical interface to JEDEC standard DDR3, DDR3L ...
Synopsys Designware Interface Timing Module Ddr Phy Dr Multiphy In Globalfoundries 40nm Wc Ddr Multiphy Globalfoundries P Core
Source: design-reuse.com
Uni-directional AMBA AHB to AHB bridge
The Uni-directional AHB to AHB bridge is used to connect two AHB buses clocked by synchronous clocks with any frequency ratio. The bridge is connected ...
Source: design-reuse.com
DDR3/2 PHY in TSMC (40nm) IP Core
Synopsys DesignWare® DDR3/2 PHY cores are mixed-signal PHY IP cores that supply the complete physical interface to JEDEC standard DDR3 and DDR2 SDRAM ...
Source: design-reuse.com