Page 24 - P Core News Today

The MXL-CDPHY-CSI-2-TX-T-40ULP is a high-frequency, low-power, low-cost, source-synchronous, physical layer supporting the MIPI Alliance Specification ...

XIP1213E from Xiphera is an extreme-speed Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018 [2]. ...

The A70 is a powerful 64-bit RISC-V application processor aimed at systems running Linux. The core has an in-order 7-stage pipeline enabling greater than ...

The Expedera Origin™ E1 is a family of Artificial Intelligence (AI) processing cores individually optimized for a subset of neural networks commonly ...

The 28 Gbps Multi-Protocol SerDes (MPS) PHYs are comprehensive IP solutions that deliver enterprise-class performance across the challenging signaling ...

The industry’s most advanced process nodes do not support 3.3V signaling and 5V tolerance as required by the USB 2.0 specification. 3.3V signaling was ...

Blumind's all analog AMPL™ neural signal processor IP for edge AI applications is designed on standard advanced node CMOS technology and can be integrated ...

The AHB Fabric provides the necessary infrastructure to connect up to 16 shared AHB Slaves to up to 16 AHB-Lite Bus Masters. The off-the-self configuration ...

The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSMC 40nm ...

The Silicon Creations wide-range 125Mbps to 16Gbps 2-lane SerDes macro includes all high-speed analog/mixed-signal functions including PCS, Loopback, ...