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March 3, 2023
The DDR5RCD01 is a registering clock driver used on DDR5 RDIMMs and LRDIMMs. Its primary function is to buffer the Command/Address (CA) bus, chip selects, ...
March 3, 2023
The Orca Systems™ ORC9010 is a synthesized or synthesizable low-power all-digital phase-locked loop (ADPLL) Digital IP designed for 2.4GHz ISM band ...
March 2, 2023
The multi-channel DesignWare® PHY IP for PCI Express® (PCIe®) 5.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands ...
March 2, 2023
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solution ...
March 2, 2023
The MXL-CDPHY-3p5G-CSI2-TX-T-28HPCP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
March 1, 2023
The ShortLink Fractional-N PLL 'SL40LP_2G1PLL_1' is a widely programmable delta sigma frequency synthesizer. It has a high integration level with integrated ...
February 28, 2023
RI_ABB_GF22FDX is a body bias voltage generator for the Racyics® ABX® adaptive body biasing (ABB) foundation IP platform for Globalfoundries 22FDX® ...
February 25, 2023
The CEVA-XC22™ DSP, based on CEVA’s 5th generation CEVA- XC20™ architecture, is the world’s most advanced and efficient vector DSP, targeted for ...
February 25, 2023
<b>A Physically Unclonable Function (PUF) is a security mechanism that uses the inherent physical variations of a device to generate a unique, unclonable ...
February 23, 2023
A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...