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February 15, 2023
Falcomm’s ultra-efficient Dual-Drive™ power amplifier technology is ideal for use in 5G mmWave and sub-6GHz applications. Our proprietary mmWave 2-stage ...
February 12, 2023
Qualitas Semiconductor's TCON eRVDS TX PHY IP is an advanced chip-on glass (ACOG) and chip-on-film(COF) transmitter embedded into the timing controller ...
February 12, 2023
The AES ULP-DPA-FIA IP core belongs to the FortiCrypt product family. This protected AES IP core provides an extraordinary AES throughput per watt. ...
February 11, 2023
The MXL-DPHY-CSI-TX+-T-40ULP is a high-frequency, low-power, low-cost, source synchronous physical Layer supporting the MIPI Alliance Specification for ...
February 11, 2023
This is a dual core I & Q Analog to Digital Converter based on the Time Interleaved SAR architecture. The IP includes a power supply regulator (LDO), ...
February 11, 2023
The ATO00512X1MX180LB52ND is organized as a 512-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in MXIC 0.18μm ...
February 10, 2023
The GRHSSL IP is a highly configurable high-speed serial link controller, described in VHDL. It can implement: * SpaceFibre controller (GRSPFI) ...
February 10, 2023
On the transmitter side, the turbo-phi encoder architecture is based on a parallel concatenation of two double-binary Recursive Systematic Convolutional ...
February 10, 2023
SAMSUNG 11nm Flip-Chip IO library with dynamically switchable 1.8V/3.3V GPIO with fail-safe capability, 5V I2C / SMBUS open-drain cell, 5V OTP cell, 1.8V ...
February 10, 2023
The multi-channel DesignWare® PHY IP for PCI Express® (PCIe®) 5.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands ...