Ultra low-power Microphone, Audio, IoT interface
STAR1000 is a state of the art ultra-low power multi-input interface and ADC. Using a break through design and patented technology it can digitize up ...
Source: design-reuse.com
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DisplayPort Receiver Link Controller IP Core
Our 5th generation DisplayPort Receiver Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link rates ...
Displayport Receiver Link Controller Main Link Secondary Channel Display Stream Compression Forward Error Correction Displayport Receiver
Source: design-reuse.com
USB Power Delivery 3.1 Physical Layer IP Core
CT20602 is a complete USB Power Delivery 3.1 Physical Layer. It also implements that part of the USB Power Delivery 3.1 Protocol Layer which are defined ...
Typec Port Controller Power Delivery Host Analog Front End Fast Role Swap Send Fast Role Swap Usb Powe Delivery Physical Layer
Source: design-reuse.com
Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 IP core
The HMAC-SHA2-DPA-FIA IP core belongs to the <em>FortiMac</em> product family. Like all the <em>FortiMac</em> product family members, this IP provides ...
Threshold Implementation Dvanced Dpa And Fia Resistant Fortimac Hmac Sha2 Ip Core Mac Sha2 Dpa Fia Ip Core P Core Ilicon Ip Emiconductor Ip
Source: design-reuse.com
MIPI D-PHY Universal in TSMC 40LP for Automotive
The MIPI D-PHY Transmitter is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY.
Source: design-reuse.com
Voltage Monitor with Digital Output (Multi-domain supply monitoring), TSMC N3E
The voltage monitor is a low power self-contained IP block specially designed to monitor voltage levels within the core logic voltage domains and provide ...
Synopsys Designware In Chip Sensing Synopsys Silicon Lifecycle Management Voltage Monitor Pvt Sensor Pvt Sensors
Source: design-reuse.com
Temperature Sensor Non-Deep NWELL, TSMC N3E
A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...
Synopsys Designware In Chip Sensing Synopsys Silicon Lifecycle Management Temperature Sensor Pvt Sensor Pvt Sensors
Source: design-reuse.com
MIPI C-PHY CSI-2 TX+ in TSMC 40ULP
The MXL-CPHY-CSI2-TX+ is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY is configured as a MIPI Master supporting camera ...
Source: design-reuse.com
USB 3.2 Gen2x2 with PIPE 4.3 and USB2.0 with UTMI+ interface
M SQUARE USB 3.2 PHY IP is designed based on the USB 3.2 Gen2x2 specification from the USB Implementer Forum. It provides bandwidth up to 20Gbps. This ...
Implementer Forum Usb Phy Sb 3 2 Phy Sb 3 2 Gen2x2 With Pipe 4 And Usb2 0 Utmi Interface P Core Ilicon Ip
Source: design-reuse.com
DDR4/ LPDDR4/ DDR3L PHY IP - 3200Mbps (Silicon Proven in TSMC 12FFC)
The DDR4/ DDR3L/ LPDDR4 Combo PHY IP provides low latency and enables up to 3200Mbps throughput. The PHY IP is compliant with the latest JEDEC standards ...
Source: design-reuse.com