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Bizen wafer process used to build Zpolar Transistors with Zpolar Tunnel Logic (ZTL); Ends monopoly of Taiwanese and Korean chip producers; Addresses semiconductor shortage crisis Maximize Chip

Search for the Next (SFN), the Nottingham-based developers of the compound combination of the Bizen wafer process, Zpolar transistor and Zpolar Tunnel Logic (ZTL), has made available a family of four ITMs (Infrastructure Time Machine) – process nodes – that will enable chip designers to produce ICs in older 180nm and even one micron geometry fabs with the equivalent performance of CMOS devices made in current state-of-the-art plants.