Synopsys Design News Today

The amazing development of transistor technology has been the main driving force behind modern electronics. Over time, this process has slowed down introducing performance bottlenecks in data-intensive applications. A main cause is the classical von Neumann architecture, which entails constant data exchanges between processing units and data memory, wasting time and power. As a possible alternative, the Beyond von Neumann approach is now rapidly spreading. Although architectures following this p...

AI and machine learning algorithms enabling EDA software to become rich data repository to give engineers greater insight into cause of design errors.

AI-driven Data Continuum Harnesses Untapped, Actionable Insights to Boost Productivity Across Design, Manufacturing, Testing, and In-Field Deployment Highlights: Comprehensive AI-driven data...

The main objective of this article is to explain synthesis flow and post-synthesis netlist quality checks. In ASIC flow, synthesis is the part of the front-end design, while the back-end design takes the synthesized netlist as an input. So, the synthesized netlist should meet all netlist quality checks to reduce multiple iterations, which reduces the turnaround time and efforts.

/PRNewswire/ -- Enabling mutual customers to deliver specialized compute, high performance and high efficiency for mobile applications including laptops,...

/PRNewswire/ -- Enabling mutual customers to deliver specialized compute, high performance and high efficiency for mobile applications including laptops,...