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Samsung demonstrates 3nm MBCFET chip: using nanochip structure to make transistors
Samsung Electronics and TSMC are currently planning to develop 3nm process technology research and development. According to reports, at the IEEE International Solid-State Circuits Conference (ISSCC), Samsung engineers shared the manufacturing details of the upcoming 3nm GAE MBCFET chip.
GAAFET transistors (gate full ring field-effect transistors) come in two forms in terms of structure, and they are an upgraded version of the current FinFET. Samsung stated that the traditional GAAFET process uses three layers of nanowires to construct transistors, and the gate is relatively thin. In addition, the Samsung MBCFET chip process uses nanosheets to construct transistors. Presently, Samsung has already registered a trademark for MBCFET. Samsung said that both methods can achieve 3nm, but it depends on the specific design.
It is expected that today s popular FinFET transistor design will give way to stacked nanosheet transistors in the coming years – for various design and technology reasons. TSMC plans to stick with FinFET for 3nm, but Samsung is bravely / dangerously forging ahead with plans for a transition to nanosheet transistors with its 3nm nodes, reports IEEE Spectrum.
Samsung Electronics vice president, Taejoong Song, presented at the IEEE International Solid-State Circuits Conference earlier this month and outlined some key advantages of nanosheet transistors. We have used FinFET transistors for about a decade, however at 3nm we are using a gate all around transistor, Song told the virtual audience. Going forward he and his team believe that nanosheet transistors will be a winning design as they provide high speed, low power, and small area.
It is expected that today s popular FinFET transistor design will give way to stacked nanosheet transistors in the coming years – for various design and technology reasons. TSMC plans to stick with FinFET for 3nm, but Samsung is bravely / dangerously forging ahead with plans for a transition to nanosheet transistors with its 3nm nodes, reports IEEE Spectrum.
Samsung Electronics vice president, Taejoong Song, presented at the IEEE International Solid-State Circuits Conference earlier this month and outlined some key advantages of nanosheet transistors. We have used FinFET transistors for about a decade, however at 3nm we are using a gate all around transistor, Song told the virtual audience. Going forward he and his team believe that nanosheet transistors will be a winning design as they provide high speed, low power, and small area.
Researchers are working on a cabling system that could provide data transfer speeds multiple times faster than existing USB connections using an extremely thin polymer cable, in a system that echoes the design path of Thunderbolt.
An Apple Thunderbolt 3 Pro cable
Presented at the February IEEE International Solid-State Circuits Conference, the research aims to develop a connection type that offers far better connectivity than current methods. In part, it aims to accomplish this by replacing copper wiring with something else.
Copper is typically used for wires like USB and HDMI to handle data transfers, but it requires a lot of power to work for high levels of data transmission. There s a fundamental tradeoff between the amount of energy burned and the rate of information exchanged, said MIT alumni and lead author Jack Holloway.